ABSTRACT

The discrete wavelet transform (DWT) is being increasingly used for image coding 3D-DWT provides interesting possibilities and has been studied to resolve the problem associated with compression of large size images. However, the main issue of concern is preserving more details in the enlarged image. On the problem that the hardware overhead in architecture for Convolution based DWT wastes a lot which is replaced here with a multiplierless design .This can be achieved with lifting approach with shifters and adders/subtractors replacing multipliers. Thus giving less number of Computations and makes control complexity very simple. This paper presents an efficient 3D-DWT (three-dimensional discrete wavelet transform) architecture of lifting based 3D DWT in FPGA which uses LeGall 5/3 filter. The lifting structure largely reduces the number of multiplication and accumulation where filter bank architectures can take advantage of many low power constant multiplication algorithms. FPGA is used in general in these systems due to low cost and high computing speed with reprogrammable property .The 3D DWT processor was designed in VHDL and implemented with a Xilinx Virtex-III FPGA.