||PCT, HT, EEPC, Compression, L1, L2, Graphically Proposed Architecture, Intelligent Permanent Cache Storage Algorithm & Technique.
Caching is built up each time when the machine starts up according to userís application usability. This built up procedure escalates the efficiency of applicationís usage for the next coming access of same application. This cache history is vanished when power is switched off. Most of the time, a user uses the same common applications in his/her daily routine, particularly during the working hours. Moreover, against every new start up, the user bears the penalty of cache rebuilt to achieve better and efficient access because on first time access, the application is opened without caching which results more time to open rather than the second time after the cache has already built up.
This paper proposes a novel idea of intelligent and permanent caching which can build up dynamically and can be stored permanently in one part of cache chip according to userís application usability. This paper describes an algorithm that how CPU can build a dynamic and intelligent Electrically Editable Permanent Cache (EEPC) according to the probability of userís application usage in a computer machine. For proposed EEPC, we implement a Probability Calculation Table (PCT) by reusing available compression techniques and through introducing some basic change in cache storage policy. On the other hand L1 and L2 implementation is also the part of this study; for example, History Table (HT) is maintained for L1 and L1 is physically addressed to the main memory. Whereas, L2 is virtually addressed with the main memory and fully associative to handle misses. We mainly focus on Cache design enhancement, improvement in cache speed and implementation issues.