e-ISSN : 0975-4024 p-ISSN : 2319-8613   
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ABSTRACT

ISSN: 0975-4024

Title : IMPLEMENTATION OF X-FACTOR CIRCUITRY IN DECOMPRESSOR ARCHITECTURE
Authors : SATHISHKUMAR.K, SARAVANAN.S, VIJAYSAI. R
Keywords : Decompressor, X-factor circuitry, Shift-in test pattern.
Issue Date : Apr-May 2013
Abstract :
VLSI testing majorly concern with test time and power consumed during testing process. This paper presents efficient Decompressor architecture for low power test applications. The aim of the paper is to reduce the transition count of shift-in test pattern which reduces the power. X-factor circuitry, the concept adopt on the decompressor architecture in efficient way to improve performance of testing. The X-factor circuitry Decompressor design captured in VerilogHDL that targeted to TSMC 0.25 micron CMOS technology and results are analyzed.
Page(s) : 1381-1385
ISSN : 0975-4024
Source : Vol. 5, No.2